000 00380nam a2200157Ia 4500
003 0STCL
008 150530s9999 xx 000 0 und d
040 _aSTCL
_cSTCL
100 _aBrown Stephen; Vranesic Zvoncko
245 _aFundamental Digital logic with VHDL Design
260 _c2005
546 _aEnglish
942 _2ddc
_cBK
999 _c41043
_d41043
005 20220125170528.0