00596nam a2200205Ia 4500003000500000008004100005020001800046040001900064082000700083100002100090245005700111250000600168260002500174300001000199365000800209546001200217942001900229999001700248952012500265STCL230726s9999    xx            000 0 und d  a9788177589184  aSTCLcSTCLbEN  222  aPalnitkar, Samir 0aVerilog HDL: a guide to digital design and synthesis  a2  bPearsonaNoidac2022  a490 p  b699  aEnglish  2DDCe22cBKDDC  c88992d88992  00102DDC4070aSTCALbSTCALcGENd2023-07-26l1o621.392 PAL-Vp97941r2026-07-18 10:42:12s2026-07-02w2023-07-26yBK